Notes for C. E. W. Bally Electronic Pinball Games Theory of Operation

Key concepts: CMOS, debounce mechanism, interrupt, SCR, solenoid, steering diode, switch matrix, zero-crossing detector.

Related theorists: Bogost, Galloway.

Title page indicates part number F.O. 601-2 revised May, 1982. Originally published in 1977.

(1) The following discussion is intended for the serious reader as an aide to increase his understanding of the Electronic game. It is, essentially, the same material presented during the Bally Service Schools and is a direct response to the requests for a written record of this material.

Consonant with Galloway, pinball platform studies demands immersion in the technical details, the reverse engineering more extensive than the critical analysis, and early notes highlight need for inverter; now criticism identifies assumption of male reader, perhaps due to male dominance of BSS attendees, as well as visual bias for metaphorical machine cognition but the focus is on the constantly interrupted procedural rhetoric of the Bally/Stern architecture. Your system comes up in the wrong state (logic level zero instead of one) to directly connect solenoid to the I/O bus was a platform difference noted during initial reverse engineering work. Your system comes up in the wrong state; it comes up at logic level zero instead of one. It is the difference between generic, immaterial computing in which zero is also the initial state, and actual TTL circuitry. Because if you use one of the digital lines to interconnect to solenoid bank select it will energize on logic level zero (low), therefore your machine must start it high. However, since the normal, uninitialized output is zero for the Intel PPI integrated circuit, connecting the I/O lines directly to the Bally pinball platform with the original connector (AxJy pin/lines z1,z2, etc.) that connects to the continuous solenoid driver and demultiplexer IC enable circuits causes solenoids to be energized at system power on.

(1) It is recommended that the reader have a set of game schematics at hand for reference purposes.

(2) The accuracy of the MPU Self-Test is about 99.5%. The MPU module catches all faults except buffer amplifier problems ('B' ports) in the PIA chips. These can easily be detected later by use of the AID1 module.

(2) An indication of 'run-away', then, can be false data in the bookkeeping functions. Probable cause: faulty Q20, leaky C23 (high ripple) or leaky zener diode. (VR1, MPU module).








(5) It is to be noted that the
zero crossing detector circuit input is the + 43VDC line to the solenoid common. Of the fuse in that line (F4 on the Power Transformer module) is blown when the power is turned on, the MPU will not allow game play until the fault on the + 43VDC line is corrected.


(6) After completing the MPU Self-Test, or between games, the MPU spends approximately 40% of its time monitoring the memory record of the momentary switches on the playfield and in the cabinet. The other time is divided between servicing the display update interrupts and the lamp, momentary switch scanning, and solenoid update interrupts.


Debounce mechanism significant enough to describe suggests reverse engineering design criterion.

(6) The MPU, as discussed under 'interrupts', looks at each switch several times before it makes a decision as to whether or not a closure is valid. This multiple-look is a debounce mechanism that prevents the electronic game from giving away points on noise pulses or stuck switches.

Basic comparison of machine control system components to human body perceptual systems and program execution to cognition, informing the program as the senses do the brain to affect behavior; machine input cast in visual terms suggests ocularcentric as well as anthropocentric critical insight of technological analysis.

(6) The momentary switches in the matrix are the 'eyes' and 'ears' of the MPU chip. It is only by means of sensing closures, and later, reacting to valid closures (during normal operation) that the MPU, thru the program, knows what it is to do next!

(7) Interrupts are used for two types of activity in the Bally Electronic game. The first is the periodic lamp, solenoid, and momentary switch status update. U10, CB1 and the display update, U11, CB1. The second is to signal the MPU to go into the Self-Diagnostic tests, U10, CA1 and that the AID1 module has assumed control, U11, CA1. The second type is discussed under “3), Self-Diagnostic Tests.”

Constantly interrupted cleverly characterizes the basic AS 2518-35 platform operation as racing (really pacing) the beam the Atari VCS; however, reverse engineered alternatives like pmrek replace this basic operational paradigm with new forms like the shotgun approach to feature lamp control.

(7) The periodic interrupts are generated by the Zero Crossing Detector and the Display Interrupt Generator on the MPU module. The former occurs at a rate of 120 times per second, or once each power line zero crossing. The second occurs at a rate of approximately 320 times per second as determined by R21, R22 and C16.
1) Zero Crossing Interrupts: 120 times per second, or once each 8.3 milliseconds, the MPU chip senses a zero crossing, time-delayed by U14 just enough to allow a voltage to appear at the anodes of the silicon controlled rectifiers that drive the feature lamps before that portion of the interrupt routine begins.

Component life extension is a fortuitous side effect of performing control operations near the AC power supply zero crossing, although its primary purpose is to maximize lamp illumination.

(7) Lamps are updated near the zero crossing to minimize the inrush current associated with a cold filament and hence extend their life. DC powered solenoids, likewise, exhibit a far smaller back EMF if turned off near a zero crossing.

True random match because match test depends on last ball outhole detection.

(7) A period of time of about 3.7 milliseconds is required by the interrupt routine. . . . The random number generator, then, counts for 0 to 9, twelve times a second. This makes it virtually impossible to cheat, and truly random.
(7) The MPU examines the status of the
solenoid period counter. It if is zero, it turns off all momentary solenoids, and branches to the feature lamp update routine. It it is not zero, it subtracts 'one' from the contents of the counter. In general, momentary solenoids (thumper bumpers, slingshots, etc) are energized for 3 zero crossings (26 milliseconds). Saucer kickers are energized longer to make sure that the ball clears the saucer.

Memory picture another visual characterization of machine operation for lamp control, which is substantially more complex and timing-sensitive than solenoid control.

(7) The MPU next enters the feature lamp update part of the program. There are fifteen, one half byte entries in U8, the CMOS scratch pad memory. This is equal to 15 X 4 = 60 bits, enough to form a memory 'picture' (lamp matrix) of the status (on or off) of each feature lamp in the game!

SCR trigger must be short enough not to flicker, presenting real-time design challenge for reverse engineering the controller.

(8) When an SCR is turned on, it will stay on for the remainder of the supply line alternation (1/120 second) and turn off at the next zero crossing. It will then stay off, unless the next update again drives the gate high.

SCR tributary statement alluding to same memory concept as Selectron of EDVAC.

(8) The SCR's then can be thought of as a type of memory or storage.
(8) The last step in the lamp module update program is to strobe an address '1111' into the chips U1, U2, U3 and U4. This is a rest address and frees the PA0 thru PA7 lines for other purposes.
(8) The feature lamps each have one lead commoned to the + 5.4VDC supply leg. The associated SCR, when turned 'on' completes the circuit to ground, thereby turning the lamp 'on'.

Future planning built into circuit layout afforded future designs, helping this platform survive until 1985 when far more advanced CPU architectures were available.

(8) Lamp Strobe #2, U11, CA2 is provision for expansion. Should a game require more than 60 feature lamps be designed, the address and data lines will be commoned to a second lamp driver module and lamp strobe #2 will be used to select and control this module.
(8) The last portion of the zero crossing interrupt routine is to read the
momentary switches and look for valid closures.

Reverse engineered designs test this switch debounce approach and deploy alternatives such as switch-specific parameters for tuning to particular playfields.

(8) It is to be noted that stuck switches, a 'closed', 'closed', 'closed' and currently 'closed' condition is ignored and does not result in a memory record of valid closure. Thus, the electronic game ignores stuck switches. Also, noise conditions such as 'open', 'closed' and currently 'open' do not satisfy the valid closure criteria, and are ignored.
(8) At the end of the time period, the entire switch matrix has been scanned and a memory record of the switches previous and current history is filed together with a record of valid closures.
(8) It is to be noted that this multiple reading of a switch takes time, i.e., it must be done over several zero crossings before a valid closure can be verified and recorded. This procedure would spoil the response time to a hit on a thumper bumper or slingshot or any electromechanical device that must react quickly. To overcome this difficulty, a special, quick reaction subroutine exists in the program dealing with 'normal operation'. This routine takes place immediately after the memory record of valid closures is reviewed. It consists of a review of the previous and current history of
just the solenoids that require a quick reaction. If an 'open', 'closed' record is found, the solenoid is energized. No scoring is involved in this routine. The net result is slingshots and thumper bumpers respond 'instantaneously'. They are not allowed to score until a valid closure is detected later. Because of this quick reaction subroutine, a noise pulse may cause a solenoid to pull (very-very infrequent). However, no points will be added to the players score. If the pull and scoring even occur for no apparent reason, it is most probably because of improperly adjusted switch contacts.
(9) The diodes in the switch matrix are
steering diodes that prevent sneak paths and subsequent false decodes.
(9) All switches in the switch matrix are driven or scanned at very low current levels. The life expectancy of these switches is excellent. . . . The contacts are gold plated.

Supervisory control is the normal game play and between-game attract operation, albeit constantly interrupted by design.

(9) The Zero Crossing interrupt is now completed. The MPU chip goes into memory and replenishes itself with its place in the program and the data it was processing prior to the interrupt. It then begins and continues in the program as if it never had been interrupted.

The first iteration of the project hoped but did not prove the 8255 PPI and Linux 2.6 kernel workqueue based solution would be adequate to control the displays. Bound to have minimum execution times but less than I/O access time?

(9) 2) DISPLAY UPDATE INTERRUPT: 320 times per second the MPU senses a display update interrupt through CA1, U11. The MPU again makes a memory record of its contents and then jumps off to service the interrupt.

Multiplexing design efficiency due to scarcity, yielding discretization unnoticed by human vision.

(9) The displays in the Bally Electronic Pinball games are multiplexed. This means that only one digit per display is on at a given point in time. If a picture of the backbox were taken with a high speed camera, the result might show that at the time the shutter opened the #6 digit was 'on' on all five display driver modules.
(9) The multiplex rate is fast enough that humans do not see the flicker resulting from the fact that each digit is actually on slightly less than 17% of the time! . . . The true advantage is the number of PIA chips required by the system are minimized.
(9) The BCD lines for all five displays are commoned. . . . Only a separate display latch strobe line is required for each of the five display driver modules.
(9) The MPU chip begins the update by determining which digit was updated last. . . . It [the CPU] causes the blanking line to go high and blank the displays. This keeps each digit clean and crisp looking by preventing flicker during update.

Another exclamation of the extremely high speed operation of the computer controlled machine against reference human perceptual limits.

(9) The process is repeated for the [2nd, the] 3rd, 4th player up display drivers and then for the match/ball in play credit display. With this complete, it enables the #5 digit, disables all other digit lines, removes the blanking pulse and returns from the interrupt to whatever it was doing previously. And all this in a period of 500 microseconds!

Interesting feature of 6800 MPU further support for constantly interrupted moniker.

(10) It is interesting to note that the 6800 MPU is capable of being interrupted while it is servicing an interrupt.

Inconsistency of heading level formatting.


(10) It is to be noted that thresholds or bookkeeping entries can be set to zero by means of S33 on the MPU module.



(19) The sound module accepts address signals from the MPU to select one of the notes stored in its tone memory (U3). . . . Addressing and triggering data information and the rate of data transmission are under MPU program control.
(19) The solenoid bank select signal is capacitively coupled to the tone trigger generator one-shot U7, which is started when the signal makes a low to high transition.

The operation of the sound module is complex but shares address outputs with the solenoids, another example of an affordance of the platform to handle additional appendages like extra lamps.

(19) The address inputs A, B, C, D and E applied to the tone memory U3 (32X8 PROM) select one of 32 possible 8-bit combinations at its data output D01 through D08.

C. E. W. Bally Electronic Pinball Games Theory of Operation. Chicago: Bally Corporation, 1982. Print.